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Main / Hardware
PinsFrom https://electronics.stackexchange.com/questions/28091/push-pull-open-drain-pull-up-pull-down Output pins can be driven in three different modes:
Input pins can be a gate input with a:
There is also a Schmitt triggered input mode where the input pin is pulled with a weak pull-up to an initial state. When left alone it persists in its state, but may be pulled to a new state with minimal effort. Open drain is useful when multiple gates or pins are connected together with an (external or internal) pull-up. If all the pin are high, they are all open circuits and the pull-up drives the pins high. If any pin is low they all go low as they tied together. This configuration effectively forms an AND gate. With the PIC32 family, there is an interesting use of open drain. The open-drain feature allows the generation of outputs higher than VDD (e.g., 5V) on any desired 5V-tolerant pins by using external pull-up resistors. The maximum open-drain voltage allowed is the same as the maximum VIH specification. Presumably conceptually the open drain means you can over-power the port with an external source without damaging the chip. BJT LexiconOpen collector has the same meaning as open drain, but is used for a BJT instead of a FET device. Power terminologyVss and Vee are the same as ground.
Watchdog TimersGreat write-up at the Muse: http://www.ganssle.com/item/great-watchdog-timers.htm Most embedded processors that include high integration peripherals have some sort of built-in WDT. Avoid these except in the most cost-sensitive or benign systems. Internal units offer minimal protection from rogue code. Runaway software may reprogram the WDT controller, many internal watchdogs will not generate a proper reset, and any failure of the processor will make it impossible to put the hardware into a safe state. A great WDT must be independent of the CPU it's trying to protect. If that's all you have, you can do a little better with it by running some code that does a few ops before kicking the dog, like a simple state change, just to make sure everything is kosher first. Normally I detest global variables, but this is a perfect application. Cruddy code that mucks with the variable, errant tasks doing strange things, or any error that steps on the global will make the WDT timeout. Do put these actions in the program's main loop, not inside an ISR. The best watchdog is one that doesn't rely on the processor or its software. It's external to the CPU, shares no resources, and is utterly simple, thus devoid of latent defects. Use a PIC, a Z8, or other similar dirt-cheap processor as a system health monitor. These parts have an independent clock, on-board memory, and the built-in timers we need to build a truly great WDT. Interface SelectionMany options, with pros and cons. PCIe is considered to be high performance compared to Ethernet and USB, and expandable with customizable lane options. However, the controller is more expensive due to focus on performance (more complicated logic too?) and the transmission line length is more limited. USB and especially Ethernet allow for much longer connections. USB is cheaper, and Ethernet cheapest probably, unless you go up to 10gig. LVDSLVDS low voltage differential signaling is a physical layer spec. Data links such as Spacewire, FireWire, SATA, SCSI, and display connectors build on top of it. Can be used in parallel and serial applications. For each signal, you have 3 wires (pos, neg, gnd). So a 2 signal interface (clk+data) would need 6 wires. Data Pipe Speeds ChartSome channels have a clock wire, while others use matched rates on both ends.
PowerThe classic USB max is 500mA at 5V. Devices that need more often have a second cable to draw from another port as well. Many USB wall outlets are rated higher, like 1 to 2.5A. Active Ethernet port on one Marvell ARM9-based SBC was known to draw about 50mA (3.3V it looks like?). On the same board, an SD card on write would do 65mA at 3.3V. A buck converter is more efficient than a linear regulator. The latter is a simpler circuit that lowers a voltage by dissipating heat instead of using a switch and cannot step up the output current like a buck does. A boost converter steps up the voltage and down the current. Buck and boost are switching regulators, meaning they use duty cycle on-off time ratios to convert the levels. Note that a PCB trace can act as a LPF for relatively high frequency interfaces, which may necessitate amplification of high frequencies at transmitter/receiver. ProtectionLow Power DesignGreat thoughts from Ganssle on experimenting with coin cell based designs: https://www.ganssle.com/tem/tem478.html I/OStandard CMOS pins give a logic 0 when near ground, and a logic 1 when near Vcc. A differential pair signals logic 0 when Vp < Vn and logic 1 when Vp > Vn. A Vref pin gives logic 0 when the level is below Vref, but logic 1 when the level is above Vref. ComponentsAmplifierAn operational amplifier (often op amp or opamp) is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output. In this configuration, an op amp produces an output potential (relative to circuit ground) that is typically 100,000 times larger than the potential difference between its input terminals. It is a type of differential amplifier. Chips/SemiconductorsThe land grid array (LGA) is a type of surface-mount packaging for ICs that is notable for having the pins on the socket (when a socket is used) rather than the integrated circuit. An LGA can be electrically connected to a printed circuit board (PCB) either by the use of a socket or by soldering directly to the board. The land grid array is a packaging technology with a grid of contacts, 'lands', on the underside of a package. The contacts are to be connected to a grid of contacts on the PCB. Not all rows and columns of the grid need to be used. The contacts can either be made by using an LGA socket, or by using solder paste. LGA packaging is related to ball grid array (BGA) and pin grid array (PGA) packaging. Unlike pin grid arrays, land grid array packages are designed to fit either in a socket, or be soldered down using surface mount technology. PGA packages cannot be soldered down using surface mount technology. In contrast with a BGA, land grid array packages in non socketed configurations have no balls, and use flat contacts which are soldered directly to the PCB. BGA packages, however have balls as their contacts in between the IC and the PCBs. The balls are normally attached to the underside of the IC. LEDshttps://learn.sparkfun.com/tutorials/polarity/diode-and-led-polarity Capacitors
Ceramic Capacitors exhibit low parasitics and excellent EMI filtering capabilities. In a multilayer configuration, they display high capacitance values and various voltage ratings over a wide temperature range. For low power designs, be careful what you use for decoupling capacitors. Take a close look at leakage specs. See: https://www.ganssle.com/tem/tem497.html Jack says "But even over room temperature, say 20 to 30 degrees, plan on twice the parasitic drain than specified. MLCC devices derate themselves. As the applied voltage increases, the effective capacitance decreases." OscillatorsAn OCXO is an oven-controlled oscillator which relies on a constant temperature for operation, and usually associated with a temp sensor. Power
ResistorsThere are various sizes of the tiny surface-mount SMD "chip" resistors. 0201 is the smallest, with 0402 being next. |